FPGA IP Cores

Vendor-independent IP cores,
ready for your FPGA.

Every core ships as portable VHDL, with state-of-the-art verification and precise documentation.

Why our IP

Technology-independent RTL, with a focus on portability across every major FPGA vendor.

Our IP cores come from the same engineering discipline as our design services: clean, portable VHDL with minimal vendor dependencies, verified with modern frameworks such as UVVM and VUnit. Our IP cores are designed and tested for Efinix, Lattice, AMD/Xilinx, Altera and Microchip, and are in continuous use across dozens of industrial projects.

We deliver first-class service: free bug-fix support for the core over several years, integration support and optional customization and porting engagements.

IP core catalog

Available for the FPGA families of Efinix, Lattice, AMD/Xilinx, Altera and Microchip.

Available
Networking · RoCEv2 / RDMA

stream2roce

Turns an AXI4-Stream into RoCEv2 RDMA writes entirely in FPGA logic. Streams sensor data straight into remote host memory, from 1 GbE without transceivers up to 800 Gbit/s.

View details Vendor-independent
Available
Interfaces · SPI

SPI Subnode

SPI Slave core connecting low-cost FPGAs to microcontrollers, SoCs or other FPGAs. A patented sync scheme lets the SPI clock exceed the FPGA system clock — high SPI rates even on small FPGAs.

View details Vendor-independent
Available
Interfaces · SPI

SPI Main

SPI Master core for high-performance SPI communication with microcontrollers, SoCs and other FPGAs. Flexible configuration supporting all SPI modes for broad device compatibility.

Available
DSP · FFT

Parallel Streaming FFT

High-throughput FFT core with a parallel streaming architecture that processes multiple samples per clock cycle — far beyond single-sample-per-cycle FFT cores.

Available
Utility · PCB versioning

1-Pin PCB Versioning

Cost-effective PCB version detection using a single FPGA pin. Precise version detection, minimal I/O, easy integration on any FPGA, scalable to many board revisions.

Coming soon
Interfaces · USB 2.0

USB 2.0 ULPI

USB 2.0 device controller with a ULPI interface (LS/FS/HS). Each endpoint is exposed as an AXI-Stream — no CPU-RAM round-trip. Up to 350 Mbit/s bulk IN measured.

View details In development
Custom

Custom IP core

Didn't find the IP you need? Tell us your requirements and we'll scope a tailored core from our design services.

What's included

A complete, integration-ready package, including documentation, verification and an example project.

Source & portability

  • Portable VHDL, free of vendor primitives
  • Parametrizable via generics for your resource and performance targets

Verification

  • Automated test environment with UVVM and VUnit
  • Hardware-proven in real projects

Documentation

  • Interface specification and register map
  • Integration example for your FPGA family

Licensing & support

  • Direct engineering support from the core's authors
  • Optional customization and porting engagements

Looking for a specific FPGA core?

Tell us your interface, target FPGA and performance goal. We take the right core off the shelf, or build a tailored one for you.

Get in touch
P2L2
P2L2 GmbH
Softwarepark 35
4232 Hagenberg im Mühlkreis
Austria

+43 681 81541388

info@p2l2.com