Certus-N2
Lattice's newest small-FPGA generation on 16 nm FinFET: the Certus-N2 family brings advanced connectivity, lower power and class-leading security.
Official design partner · Lattice Semiconductor
Lattice design partner
Lattice design partner
FPGA expertise, refined since 2004.
As an official partner of Lattice Semiconductor, we have been building with their FPGAs since 2004, more than twenty years of hands-on experience. From ultra-low-power iCE40 to the mid-range Avant and the latest Nexus 2 platform, we deliver efficient, verified designs for embedded and edge applications.
More than 20 years with Lattice tools and silicon, from ispLEVER to Radiant.
Since 200420+ years with Lattice
Low power & edgefrom iCE40 to Avant & Nexus 2
Radiant · Diamond · Propelfull Lattice toolchain
Design · Verify · Firmwareend-to-end delivery
The partnership in one sentence
Two decades of Lattice know-how, at your service
We have been leveraging Lattice FPGA technology since 2004. That long-standing experience lets us deliver exceptional solutions for embedded systems, particularly where low power, small footprint and tight cost targets matter. We bring the strengths of Lattice silicon to your product with efficient, optimized designs tailored to your specific requirements.
Our proficiency spans the full Lattice design flow and multiple device generations, from the early ispXPGA and ispLEVER days, through the Nexus platform, to today's Avant and the latest Nexus 2 generation. Whether you are starting a new design, porting an existing one, or need a second pair of expert hands, we know these devices and their tools inside out.
See P2L2 in the Lattice Partner Network
Device families
Latest · Nexus 2 platform
Mid-range · Avant platform
Nexus platform
General-purpose logic
Instant-on control
Ultra-low power
Long-lifecycle & legacy
Lattice devices we design with
From the newest 16 nm FinFET Avant and Nexus 2 platforms down to ultra-low-power iCE40, plus long-lifecycle legacy devices.
Avant-E · Avant-G · Avant-X
The 16 nm FinFET mid-range platform with up to 25 Gb/s SERDES: Avant-E for edge AI, Avant-G for general mid-range, Avant-X for secure, bandwidth-intensive systems.
CrossLink-NX · Certus-NX · CertusPro-NX · MachXO5-NX
The low-power Nexus generation for edge processing, vision and sensor bridging, combining efficiency with modern I/O and on-chip memory.
ECP5 / ECP5-5G
Balanced logic, DSP and SERDES for cost-sensitive bridging, industrial connectivity and mid-range signal processing.
MachXO / MachXO2 / MachXO3
Non-volatile control FPGAs for board management, I/O expansion, bridging and power-up sequencing with fast configuration.
iCE40 / iCE40 UltraPlus
Tiny, low-power FPGAs for always-on sensing, glue logic and mobile applications, where every milliwatt and every square millimetre counts.
ispXPGA and earlier
Deep experience reaching back to ispXPGA and ispLEVER, valuable for maintaining, porting or extending long-lifecycle designs.
Toolchain
Fluent across the Lattice design tools
- Lattice Radiant: the current flow for Nexus, Nexus 2, Avant and iCE40 UltraPlus
- Lattice Diamond: ECP5, MachXO and classic families
- Lattice Propel: RISC-V / SoC design and integration
- iceCube2 & ispLEVER: iCE40 and long-lifecycle legacy support
- Lattice sensAI: edge AI / neural-network acceleration stack
- Lattice mVision: embedded-vision solution stack
- Reveal on-chip debug and Radiant Programmer
- Timing closure, constraints and static timing analysis
What we bring
Fields of excellence
Embedded system architecture
We design the complete system: selecting the right building blocks (FPGA, microcontroller, ...), partitioning the functionality across them and defining the interfaces between them.
FPGA design
Architecture and RTL targeting high performance at low resource usage, plus porting, SoC-FPGA and embedded-Linux work.
Verification
Structured verification with UVVM, VUnit, OSVVM and Cocotb: self-checking testbenches, regression and formal methods.
Firmware
Low-level drivers, hardware abstraction layers, Linux drivers and RTOS integration to connect the FPGA to its host.
Tooling
Automated build and test with Docker, GitHub Actions and GitLab CI/CD, plus automated requirements tracking.
PCB & hardware design
Schematic and PCB design support around the FPGA (component selection, signal integrity, power and interfacing) so the board and the FPGA fit together from the start.
Planning a Lattice design?
Tell us your target device and requirements. We'll bring two decades of Lattice experience to your project, from concept and RTL to verification and firmware.
P2L2 GmbH